Analog to digital recorder



E. M. JONES ANALOG TO DIGITAL ENCODER Sheets-Shea Aug. l5, 1967 OriginalFiled April 8.

Au8- 15, 1967 E. M. JONES Re. 26,252

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PU L 5 E GENE-Aron l j 39 ,q/va N gfffme7%f 46, l`arn/gd United StatesPatent Ofilice Re. 26,252 Reissued Aug. 15, 1967 26 252 ANALOG TODIGITAL ENCODER Edward M. Jones, Cincinnati, Ohio, assignor to D. H.Baldwin Company, a corporation of Ohio Original No. 2,986,726, dated May30, 1961, Ser. No. 651,389, Apr. 8, 1957. Application for reissue May29, 1963, Ser. No. 296,150

25 Claims. (Cl. 23S- 154) Matter enclosed in heavy brackets appears inthe original patent but forms no part of this reissue specilication;matter printed in italics indicates the additions made by reissue.

The present invention relates to digital code disc converters, and moreparticularly to a system for obtaining a Vernier reading from a codemember, specifically, but not necessarily a disc.

Heretofore, it has been assumed that the quanta obtainable from a codedisc was limited by the number of digits on the disc. Thus, the quantafrom a sixteen digit cyclic binary code disc would be 65,536. The arc ofeach quanta would be zero degrees, zero minutes, 19.77 seconds. Tomaintain the error due to spreading of the photographic image andbearing imperfections to a small fraction of a quanta, a plate isrequired with a diameter of nearly sixteen inches. Thus, it becomesapparent that at present an increase to a twenty digit code discencounters various problems. The size and accuracy required by presentmanufacturing methods is considered impractical.

In accordance with the present invention, it is proposed to obtainquanta equivalent to those derived from a twenty digid code disc from asixteen digit code disc by a vernier method or system. This system isapplicable to any code member, be it circular, rectilinear, cylindrical,

conical, or otherwise, even though made by manufacturing methods farimproved over those now available, or applicable to small code discs inorder to achieve compactness, so that at least four extra digits areobtainable in excess of those normally obtained from the disc by presentconventional methods. In accordance with the present invention,sinusoidal signals are utilized to derive thirty-two quanta per sinewave. These signals are derived for auxiliary equipment associated witha reference circle having a large number of divisions. These quanta arethen correlated or integrated with other quanta obtained in the normalmanner from a code member, such as a disc or a Wheel.

It, therefore, is an object of the present invention to provide a highaccuracy analog-to-digital encoder.

Another object of the invention is to provide an analogto-digitalencoder to measure angular increments represented by twenty straightbinary digits.

Another object of the invention is to provide a system which derives aVernier cyclic code which meshes with a coarser code derived from a codemember.

Another object of the invention is to derive at least four extra digitsbeyond those digits normally available from a code disc with presentmethods.

Still another object of the invention is to provide an arrangement forintegrating a large number of divisions in a code member reference trackto eliminate the effects of dust and imperfections.

A still further object of the invention is to provide an arrangement inan analog-to-digital encoder for deriving a sinusoidal output voltage inaccordance with a code disc reference circle.

Other and further objects subsequently will become apparent by referenceto the following description taken in conjunction with the accompanyingdrawings, wherein:

FIGURE 1 is a block diagram of a system for obtaining extra digits andcoordinating them with digits derived from a code disc to provide anoutput corresponding to the digits which would have been derived from amuch larger code disc;

FIGURE 2 is a representation of certain wave forms utilized to deriveextra digits or quanta;

FIGURES 3, 4, 5 and 6 are graphical representations illustrating themode of operation of the five digit cyclic code generators employed inFIGURE 1;

FIGURE 7 illustrates the addition of processed information to yield astraight line graph of electrical output versus mechanical input;

FIGURE 8 diagrammatically illustrates an arrangement for eliminatingcertain ambiguities and errors in the system of FIGURE 1;

FIGURES 9 and l() diagrammatically illustrate details of the arrangementrepresented in FIGURE 8;

FIGURE 11 is a partial block diagram illustrating the operation ofcertain elements of FIGURE 1;

FIGURES 12 and 13 are diagrammatic representations illustrating themanner of obtaining sinusoidal wave outputs derived in accordance with acode disc reference circle;

FIGURE 14 is a diagrammatic representation showing one way of performingthe cyclic to straight conversion indicated by rectangles VII and VIIIof FIGURE 1; and

FIGURE 15 is a diagrammatic representation of a comparator arrangementsuitable for performing the action indicated by rectangle IX of FIGURE1.

Generally speaking, an encoder constructed according to the presentinvention is capable of encoding analogue information into a greaternumber of digits without losing accuracy because of the fact that anumber of the less significant digits are generated with the requiredaccuracy by a code generator, and these digits are added to the digitsdirectly encoded by the optical code member. The code which forms theless significant digits is generated from a reference track carried bythe code member itself, thus assuring proper phase relations between thedirectly encoded digits and the less significant digits which areobtained from a code generator. Four sinusoidally varying voltages withequal phase differences are derived from the reference track of the codemember and employed to generate a live digit cyclic code. As a result ofderiving sinusoidally varying voltages from the reference track, ratherthan employing transitions to determine angular displacement as is donewith the more significant digits, only the centers of the referencetrack require the accuracy implied by the total number of digits of thecode, and an averaging technique is here employed to reduce theseerrors. In order to eliminate errors due to mechanical defects in therotation of the code disc, two tive digit cyclic codes are generatedfrom sinusoidally varying voltages derived from the reference track onopposite sides of the code disc, and these codes are combined to cancelout such errors. Both the more significant digits and the lesssignificant digits are converted from cyclic to straight code, andappear combined as a single parallel output.

The block diagram in FIGURE 1 illustrates a system for obtainingadditional quanta or digits from a digital code disc to increase theaccuracy of final reading, or to decrease the incremental values beyondthose normally obtainable by commonly used conventional methodsemploying a code disc converter system. To illustrate the inventioncertain assumptions will be made, which are not deemed to belimitations, but merely illustrate the advantages which are obtainableby the present invention. At present due to various limitations, it isconsidered uncommon to employ a cyclic binary code having more thansixteen digits. Hence in the present instance, it is assumed that asixteen digit binary code disc having a least significant trackcontaining 16,384 divisions and then a reference circle of 32,768divisions is employed. This disc is so utilized as to obtain fromrectangle I of FIGURE 1 a sixteen digit cyclic code output.

At the same time, rectangle II illustrates that additional data areobtainable from the reference circle by the use of two groups ofauxiliary gratings and photo-cells. With the relined arrangement ofreading this additional circle described below, this circle can havedefects not normally tolerated in code discs, such as variation in widthand density of the divisions in various parts of the circle. Actuallythe only requirement of this extra circle is that the centers of thedivisions are accurate within the one second or better accuracy impliedby the 20 digit system, and that the bearing maintains the center ofrotation at the center of this circle within a distance corresponding to1A of the center to center spacing of these divisions.

It will be noted that four photocells A, B, C, and D are obtained at thezero degree position of the reference circle and that at 180 there arelocated four photocells A', B', C', and D. `Each group of photocellssupplies outputs which are separated by a phase relation of 90. Thelight entering each of these two groups of photocells is integrated overapproximately 100 divisions of the 32,768 division reference circle toeliminate the elects of dust and other imperfections. The auxiliarygratings interposed between the reference circle and the groups ofphotocells are so designed as to provide a sinusoidally varying outputvoltage at each photocell. It is desired to obtain substantially perfectsine wave outputs at each photocell so that the accuracy of the codewill not be impaired.

Accordingly, from rectangle II of FIGURE l, it is possible to initiate afive digit system in which thirty-two quanta will be derived from eachsine wave. The output of rectangle I is utilized to provide the rstsixteen digits of a code. The sixteen digits obtained from the cyclic tostraight converter will be utilized in determining which sine wave ofthe reference circle output derived from rectangle II will be employed.Thus, the sixteenth digit output from rectangle I serves to perform atransition which subsequently will be described. It will be noted thatfour outputs from photocells A, B, C, and D are fed to rectangle III,which is a live digit cyclic code generator. The outputs from photocellsA', B', C', and D' are fed to rectangle IV, which is another ve digitcyclic code generator similar to the code generator in rectangle III.

The sixteen digit output obtained from rectangle I is supplied torectangle V, which is a cyclic to straight code converter. Fifteendigits from the output of rectangle V are supplied to an adder inrectangle X. The sixteenth output digit of rectangle V is supplied to anand circuit illustrated as rectangle VI. The five digit cyclic codegenerator supplies ve output voltages which are supplied to rectangleVII, which will be denoted as a Y cyclic to straight converter. One ofthe outputs from rectangle III is supplied to the and circuit ofrectangle VI. The rectangle VI produces an output upon the ocurrence ofcertain conditions. The output will be known as a quantity M, which iseither thirtytwo or zero depending upon the precedent conditions. Thus,under certain circumstances, the adder X will re ceive a voltage M whichis then integrated into the final output of this device.

The adder X also receives the ve outputs from the Y cyclic to straightconverter of rectangle VII. The outputs of this latter rectangle arealso supplied to a comparator IX, which also receives five outputvoltages from rectangle VIII, which is the Z cyclic to straightconverter energized in accordance with voltages obtained from the secondve digit cyclic code generator in rectangle IV. The comparator ofrectangle IX produces an output voltage N, which corresponds to eitherzero or sixteen depending upon certain conditions. The quantity N isadded into the final output by the adder rectangle X. The adder X alsoreceives voltages from the Z cyclic to straight converter of rectangleVIII. The nal output of rectangle X is equivalent to the incrementsrepresented by a twenty straight binary digit disc. In other words, theoutput indicates an incremental measurement of angular displacement of360 divided by 22 or 1%. second increments.

Because of the accuracy required in measuring angles to l0 seconds ofarc, as in the example here dis-closed, it is necessary to eliminateerrors due to turntable wobble as stated above. Were this not necessary,it would only be necessary to combine the less significant digitsderived from the reference track with the more significant digitsdirectly encoded by the code member in the adder X, and the second codegenerator IV, photocells A', B', C', and D', and circuit VI, converterVIII, and comparator IX could be omitted. However, since the turntableintroduced errors are omitted by generating two live digit codes phaserelated by 180 degrees and adding these two codes, it is necessary toprovide some means to utilize the sum of these codes in obtaining theultimate output. In the particular example here disclosed, this isaccomplished by shifting the decimal point in each of the generatedcodes one place to the left, thus dividing the codes by two, and thenadding the quotient of the two generated codes together. However, sincethe two generated codes are 18() degrees different in phase, asindicated in FIGURE 7, it is necessary to add one half the total valueof total quanta value of each of the codes when the rst code exceeds thesecond code in order to permit the sum of the quotients to proceedlinearly to its maximum value, which is the total value of either one ofthe generated codes. This is the purpose of the comparator IX whichgenerates the signal N so that has an average value proceeding linearlyfrom 0 to 32 with rotation of the code disc.

As stated in FI'G'UREI and shown in FIGURE 7, the portion of the codedirectly encoded has an average value which is below the value of thetrue angle being encoded by an amount equal to the total value of thecode generated from the reference track on the code disc. This isnecessary since Y/Z-t-Z/Z can never be zero, due to the difference inphase relation, and hence values below 8 can only be obtained by addingthis sum to a negative code value, as is clear from FIGURE 7. However,during the periods when Y/2-l-Z/ 2 gives the proper value when added tothe value of the code obtained directly from the code disc, and circuitVI must add the total value of the code generated from the referencetrack to give the proper value for the entire code.

It was stated that the output voltages of the four photocells A, B, C,and D varied sinusoidally, and these voltages have been illustrated bythe representation in FIG- URE 2. In order to convert the five digits inproper relationship, voltages A, B, C, and D are supplied directly torectangle III and compared with each other so as to produce the outputs1, 2, 3, 4, and 5 in proper sequence. It will be noted that the output 1is determined by the relationship between D and B and is arranged sothat if D-B is positive, a standard pulse representing a l is produced.Output 2 depends in a similar manner on C-A. Output 3 of rectangle IIIis determined by a comparison of the relative magnitudes of thedifferences between several diterent voltages obtained from thephotocell outputs. Hence, output 3 is determined by lB-DI-lA-Cl. Output4 is determined by and also by ]B-Dl-.414{A-C|, both of which must bepositive to give an output 4 out of the and circuit. Output 5 isdetermined by three different comparisons set forth in detail within therectangle III.

A comparison of these magnitudes which are employed in determining theoutputs l, 2, 3, 4 and 5 of rectangle III, is graphically illustrated bythe curves in FIGURE 3. Certain ofthe comparisons made are furtherillustrated by the graphical representation in FIGURE 4. It will benoted that in rectangle III smaller rectangles T1 to T8 have been shownas serving to make certain comparisons and to produce certain outputs.The outputs of rectangles T4 to T3 are illustrated in FIGURE 5. Theseoutputs of the rectangles T1 to T3 in turn determine the output voltages1, 2, 3, 4 and 5, which is FIG- URE 6 have been denoted Y1 through Y5.It will be appreciated that the other five digit cyclic code generatorin rectangle IV and the cyclic to straight converter in rectangle VIIIoperate to produce five similar voltages Z1 to Z5.

The small rectangles T1 to T8 may be ip-op circuits functioning toprovide an output of zero or an output of 1. An output of 1 occurs whenthe following conditions exist:

From this it will be seen that the following relations obtain:

The and and comparator rectangles VI and IX comprise transitioncoincidizer circuits functioning to progress the output code in thecorrect order. From reference to FIGURE 7, it will be noted that ifY1':0 and X16 is equal to l, then M is equal to 32 is added. Thisillustrates the function of the control voltage X16 since the sixteenthdigit is thus effective at that time when Y1' becomes 0. It is to benoted that the X voltages and the Y voltages are supplied to the adderof rectangle X in parallel form. The voltages Z and M are fed to theadder in serial orrn. The necessary sequencing is accomplished withshift registers coupled to a multi- Vibrator which initiates the shiftpulses. The multivibrator is initially triggered from the programer,which also furnishes trigger information to the Hash lamps that are usedto illuminate the code patterns and the reference circle.

It will be noted that rectangle X, whi-ch is composed of adder typecircuits vwhich may comprise flip-flop stages, adds Y Z sts thereby toeffectively cancel out any errors arising from bearing run out andeccentricities. This will be appreciated from the representation ofthese quantities shown in FIGURE '7. This cancellation or error is soeffective as to eliminate an error up to ten seconds of arc. This is dueto the fact that this error would show in the quantity Y, but a similarand opposite error would appear in quantity Z.

In FIGURE 8 there is represented a code disc 30 having a plurality ofalternate dark and light code markings 31 which cornprise the digits ofthe disc. Near the outer periphery is a reference circle 32 whichheretofore has been referred to. Along a slit are located a group ofphotocells 34, which in the example assumed would be sixteen in numberto provide the sixteen outputs from rectangle I of FIGURE 1. Two groupsof four photocells 35 and 36 at zero degrees and 180 correspond to thegroups of photocells associated with rectangle II of FIGURE l.

The representation shown in FIGURE 9 further illustrates the arrangementof FIGURE 8. Beneath the disc 30 is located a pulsed light source 37,which preferably is of gaseous discharge type delivering a light pulseof about ten microseconds per time. Light from the source 37 is focusedthrough a lens 38 to pass through the reference circle 32, whereupon itpasses through another lens 39. The light from lens 39 then passesthrough the auxiliary pattern elements 41 each associated with anindividual lens 42, which in turn projects the light upon the group ofphotocells A, B, C and D. An alternative Way of arranging this is shownin FIGURE l0 where the light from the lens 39 passes through threepartially reflecting mirrors 43, 44 and 45, and then is received bysuitable lens associated with the photocells A, B, C and D. Theauxiliary grating or auxiliary pattern 41 for the various photocellspreviously has been described as integrating nearly one hundreddivisions of the reference pattern for ea-ch photocell. The alternatedark and light image obtained from the reference pattern is shown inFIGURE 12 as 32 and being intercepted by the auxiliary pattern 41. Theauxiliary pattern may be of the variable area illustrated in FIGURE l2or may be of the variable density type so as to produce pulses in theoutput of each photocell having an envelope which is sinusodial. Thesesinusodial pulses 50 are shown having a sinusodial envelope S1 in FIGURE13. Any errors due to the bearing are eliminated by the use of the twosets of photocells 35 and 36 of FIGURE 8 controlling the production ofcodes Y and Z which are averaged together in the adder.

As further explanation of the arrangement of the circuits shown inrectangle X, reference may be had to FIGURE l1 which shows rectangles X,Y and Z supplying certain voltages to a plurality of frequency dividers.There are twenty-one frequency dividers or fiip-ops, the latter tenbeing illustrated and designated F12 through F21, and the input of eachof these dividers is connected to the output of the preceeding divider,so that each divider vvill trigger once for each two triggers of thepreceding divider. Each of the dividers has an input for a reset pulsegenerated from a programmer approximately simultaneously with the ashingof the light source. The fifteen outputs of the cyclic to straightconverter V representing the most significant digits are also connectedto the inputs of the first fifteen dividers, this connection fordividers F11 through F15 being illustrated in FIGURE l1. Hence, each ofthese dividers will trigger responsive to a pulse from the converter Vrepresenting the particular digit of that divider.

The output of the converter VII representing the most significant digitof the code generated by the generator III, designated Y1 in FIGURE ll,is connected to the input of the divider F17 in parallel with the outputof the converter VIII representing the most significant digit of thecode generated by the generator IV. In like manner, correspondingoutputs of the converts VII and VIII representing less significantdigits are connected to the input of the dividers F18 through F21,respectively.

As stated above, outputs of the converters V and VII are impressed uponthe dividers in parallel form, hence triggering only those dividersreceiving a pulse derived from a transparent sector of the code disc ora pulse from the converter VII. Since the Z voltages from the converterVIII are impressed upon the dividers F17 through F21 in serial form, theleast significant digit being first, some of the dividers can beexpected to trigger a second time, thus triggering the followingdivider. In this manner, addition of the outputs of the converters VIIand VIII is accomplished. Further, since the twentieth digit is obtainedfrom the divider F20, rather than F21, the generated codes from theconverters VII and VIII have been divided by two, for the purposedescribed above.

The output of the comparators VI and IX are connected to the inputs ofdividers F14 and F15, respectively. During the periods when each ofthese comparators produces an output pulse, the respective divider istriggered. Thus, the N signal adds 16 to the output and the M signaladds 32 to the output. From this it will be seen that the output of theadder of rectangle X of FIGURE 1 is a series of voltages U1 through U20.

The purpose of a cyclic to straight converter is to obtain the outputsX1 X16 and Y1 Y5 according to the following relationships:

Noria-Y is divided by 2 in the adder by shifting the decimal point oneplace.

By reference to FIGURE 7 it will be seen that the sixteenth digit X111obtained from the sixteen digit cyclic binary code disc, and fed throughthe converter V, is used to determine a number of things. This sixteenthdigit determins which sine wave of the reference circle in the block IIwill be used. Coming from block V it controls certain transitions in theadder X at 16, 48, 80, etc. quanta. In FIGURE 7 it will be noted that 6has been indicated at which is about 1.285 seconds of arc. Thus for eachrotation of 1.285 seconds of arc, a quanta will be obtained. The quantaY and Z are obtained from the reference circle division through thevarious means illustrated in the rectangular representations in FIGUREl. In order to average out Certain errors, quanta 7 ELE-nudgare used bythe adder X, and hence they have been illustrated in FIGURE 7. Atcertain times the adder is to receive additional information in additionto rYZ Mfr@ in order that the adder may provide the ultimate outputquantity U. Thus, if Y Z, then N=16 is added. This occurs in the angularrotation of quanta zero to 8, 24 to 40, 56 to 72, etc. Upon otherconditions prevailing, the quanta M232 is added, provided that Y1=0 at atime when X16:1. This occurs during the quanta periods 8 to 16, 40 to48, and 72 to 80, etc.

The graphical representation in FIGURE 7 further illustrates theincremental values obtained from If the reference slit is at zerodegree, then the outputs derived from the Y cyclic code converter VIImay be taken as a reference. It then may be shown that an error up to i8quanta (or approximately 110 seconds) in the Z output, which is a groupof outputs derived from the information supplied from the 180 slit, canbe eliminated by the addition of It can be shown that, if there is anerror in Y up to 10 seconds of arc, there will be a similar but oppositeerror in Z. FIGURE 7 also shows the relationship between X11, and YIZYI.

A typical cyclic to straight converter represented by the rectangles VIIand VIII of FIGURE 1 is shown in FIGURE 14. Such converter could have asequential pulse generator 52 which has an initiating input 53responsive to the pulse which controls the light source 37 of FIGURE 9.The sequential pulse generator 52 upon receiving the initiating signalor pulse from input 53, thereafter at regularly timed intervals suppliessuccessive pulses to output conductors 54 through 58. These pulses mightoccur at 10, 20, 30, 40 and 5() microseconds after the lamp flash.

When the lamp is flashed, the various trigger circuits T1 through T8 ofrectangle Ill of FIGURE 1 are triggered to give an output of l or 0according to whether positive or negative pulses are received by them.The trigger circuits are arranged to retain their respective outputs asD.C. voltage levels until the next lamp ash occurs. These voltages aredesignated Y1 through Ys'.

The voltages Y1 through YE are supplied to a plurality of and circuits61 to 65 which are also connected to conductors 54 and 58 respectively.The outputs of the and circuits are supplied to an or circuit 66 havingan output connected to a ip i'lop 67. The flip flop 67 has another inputcircuit 68 provided with a reset pulse coincident with the lamp Hashpulse thereby periodically resetting the flip flop 67 to a 0 condition.

The output of the flip flop 67 is supplied to a plurality of andcircuits 71 to 75 which are connected t0 the conductors 54 to 58respectively. Upon being reset to the 0 condition, the flip flop 67successively goes into conditions representing a five digit straightbinary cod. By combining the output of the ilip op 67 with the andcircuits 71 to 75, the digits Y1 through YS of the straight binary codeare obtained as pulses on the outputs of the and circuits 71 to 75.

This sequential presentation of the ve digit code is particularly suitedfor the comparator of rectangle IX as represented in FIGURE 15. Thecomparator of FIGURE l5 utilizes two or circuits 77 and 78. The pulsesY1 through Y5 are supplied to the or circuit 77. Similarly generatedpulses Z1 through Z5 obtained from rectangle IV of FIGURE 1 are suppliedto the other or circuit 78.

The function of the comparator is to generate a pulse N whenever thelive digit number represented by the Y pulses is greater than the fivedigit number represented by the Z pulses. A simple method of comparisonis to compare successively similar or corresponding digits of the two vedigit numbers, starting with the most significant ones (Y1 and Z1), andproceeding until two digits are found to be different.

This comparison is obtained by supplying the signals from the or"circuit 77 directly to an and circuit 81, and through an inverter 82 toan and circuit 83. Similarly the output of the other or" circuit 78 issupplied directly to the and circuit 83 and through an inverter 84 tothe and circuit 81. If both digits are the same, i.e., either both are 1or both are 0, then neither and circuit will produce an output.

If the Z pulse is 1 and the Y pulse is 0, the and circuit 83 willproduce a 1 output which will pass through an or circuit 85 to a Iiipflop 86. The flip flop 86 was originally set to a 0 condition by a resetpulse on input conductor 87. The flip flop 86 in going from 0 conditionto l triggers a pulse generator 88 connected to an and circuit 89. Inthis instance the and circuit 89 produces no output since the Y input onconductor 90 is 0. There is no possibility of producing an output fromthe and circuit 89 until the ip op 86 is reset by the next lamp ashpulse.

If the Z pulse is O and the Y pulse is 1, the and circuit 81 willproduce 1 output which will trigger the ip flop 86 thereby actuating thepulse generator 88. Since the Y pulse on conductor 90 is 1, the andcircuit 89 will produce an output N.

In the foregoing comparisons it will be noted that upon a differencebetween the Y and Z digits, the output N is dependent upon whether Y is1 or D at the instants that the digits are being compared. An outputfrom the and circuit 89 occurs only when the five digit numberrepresented by the Y pulses is actually `greater than the numberrepresented by the Z pulses.

While for purposes of a simplified explanation certain circuits havebeen designated for the diagrammatic embodiments shown in FIGURES 14 andl5, the invention is not to be limited thereto. Having had the benefitof the disclosures and explanations of FIGURES 14 and 15, those skilledin the art will readily envision other arrangements. Since the Y pulsesan-d the Z pulses occur simultaneously, the or circuits 77 and 78 couldbe eliminated by connecting the conductor 70 directly to the output ofthe ip flop 67 of FIGURE 14 and the conductor 80 to the output of the ipop corresponding to ip fiop 67 which is provided for the Z pulses inrectangle VIII. From this it will be furthermore apparent to thoseskilled in the art that the functions of the circuits in rectangles VIand IX of FIGURE 1 serve as transition coincidizers to progress theoutput code in the correct order and to provide at the proper times theeffective quantities M and N for the adder X.

While for the purpose of illustrating and describing the presentinvention certain embodiments have been shown in the drawings, it is tobe understood that such modications and variations may be made as may becommensurate with the spirit and scope of the invention set forth intihe accompanying claims.

I claim as my invention:

1. In an analog to digital encoder system, a digital code member havinga plurality of tracks and a reference track divided into equal segmentsat least as fine as the smallest segment of the other tracks, means forderiving multidigit code signals from said reference track including aplurality of electrical pickup means confronting said track forgenerating electrical waves differing in phase by equal increments of360, means for algebraically combining the generated electrical wavesinto at least as many combinations as generated waves, and means forproducing a digital output from each combination of said generated wavesresponsive to a threshold potential of the combined waves, means forgenerating multidigit code signals from the other tracks of the codemembers, and means for combining said reference track digital signalswith the digital signals obtained from said code member.

2. In an analog to digital encoder system, a digital code member havinga group of tracks and a reference track divided into equal segments atleast as fine as the smallest segment of the group of tracks, means forderiving digital signals from the group of tracks of said code member,means for deriving from said reference track a plurality of additionaldigital signals beyond those available from the group of tracks of saidcode member including a plurality of electrical pickup means confrontingsaid track for generating electrical waves ditering in phase by equalincrements of 360, means for algebraically combining the generatedelectrical waves into at least as many combinations as generated waves,and means for producing a `digital output from each combination of saidgenerated waves responsive to a thereshold potential of the combinedwaves, and means for combining said additional digital signals with thedigital signals obtained from said rst means to produce an outputcorresponding to a code member having a total number of digitsapproaching the sum of those of said first member together with saidadditional digits.

3. In an analog to digital encoder system, a digital code disc having aperipheral reference circle divided into a large number of alternateopaque and transparent areas, two groups of photoelectric responsiveunits located at opposite sides of the diameter of said disc, a lightsource for each group of photoelectric responsive units, means forcausing said units each to generate a sinusoidally varying wave inaccordance with said reference circle, the outputs of said unitsdiffering in phase by equal increments of 360, means for deriving adigital code output in accordance with the outputs of eaoh group ofunits including means for algebraically combining the generatedelectrical waves into at least as many combinations as generated waves,and means for producing a digital output from each combination of saidgenerated waves responsive to a threshold potential of the combinedwaves, means for obtaining a digital output from said code disc, andmeans for coordinating and combining all said digital outputs to providea higher order digital code output.

4. In an analog to digital encoder, a code number having an evenlydivided reference track, means for deriving a plurality of sinusoidallyvarying waves in accordance with said reference track, said sinusoidallyvarying Waves being phase displaced by equal increments, including meansfor algebraically combining the generated electrical waves into at leastas many combinations as generated waves, and means for producing adigital output from each combination of said generated waves responsiveto a threshold potential of the combined waves.

5. In an analog to digital encoder, a code member having an evenlydivided reference track, photoelectric means for deriving at least threesinusoidally varying waves in accordance with said reference track, saidsinusoidally varying waves being phase displaced by equal increments,including means for algebraically combining the generated electricalwaves into at least as many combinations as generated waves, and meansfor producing a digital output from each combination of said generatedwaves responsive to a threshold potential of the combined waves.

6. The combination comprising a tive digit code generator, a code memberhaving an evenly divided reference track, means for projecting lightthrough said reference track, a plurality of photoelectric devicesarranged to be energized by said light, means `for integrating the lightpassing through a number of divisions of said reference track and fordistributing said light among said photoelectric devices, means forcausing said photoelectric devices to produce sinusoidally varyingsignals, and means for controlling said five digit code generator withsaid sinusoidally varying signals.

7. The combination according to claim 3 wherein the digital code outputsderived in accordance with said photoelectric units are supplied to anadder together with the digital output from the code disc.

8. The combination according to claim 3 wherein the means forcoordinating and -combining all digital outputs comprises an addercombining one half of each of the outputs derived from saidphotoelectric units with the digital output from the code disc.

9. An encoder according to claim 2 wherein each track of the group oftracks of the `code member define opaque and transparent sectors equalin number to a power of two, and the group of tracks have sectors equalin number to su-ccessive powers of two, the reference track havingtransparent and opaque sectors equal in number to the next higher powerof two from the finest divided track of the group, the means `forcombining the additional digital signals with the digital signals fromthe first group of tracks including means to add a correction quantityto the digital output when the least significant digit of the binarynumber produced by the rst group of tracks has an output.

10. The encoder according to claim 2 wherein the means for combiningsaid reference track digital signals with the digital signals of thecode member includes means for correlating the output of the secondmentioned digital signal deriving means with the digital signals fromthe code member.

11. In an analog to digital encoder system, a digital code disc having aperipheral reference circle divided into a large number of equal areasof opposite significance, electrically responsive means located adjacentsaid reference circle and diametrically opposite each other, meansactuated by said electrically responsive means for generatingsinusoidally varying outputs, means for deriving a digital code outputhaving a plurality of quanta from said sinusoidally varying outputs,means for deriving from said code disc a plurality of digital quanta,and electronic adder means for combining said two sets of digital quantato provide a higher order digital code output.

12. An analog-to-digital encoder comprising a code disc having a firstgroup of tracks and a reference track having a number of equal divisionsof an order higher than the number of divisions in any track of the rstgroup of the code member, a plural digit code generator controlled bysaid reference track, means for deriving a code output from the tirstgroup of tracks of said member, and an adder for receiving the quantaoutputs of said code member means and said code generator.

13. An analog-to-digital encoder comprising a code member having a firstgroup of tracks and a reference track having a number of equal divisionsof the next higher order than the number of divisions in any track ofthe first group of the code member, a five digit code generatorcontrolled by said reference track including a plurality of electricalpickup means confronting said track for generating electrical wavesdiiTering in phase by equal increments of 360, means for algebraicallycombining the generated electrical waves into at least as manycombinations as generated waves, and means for producing a digitaloutput from each combination of said generated waves responsive to athreshold potential of the combined waves, means for deriving a codeoutput from the first group of tracks of said member, an adder forreceiving the quanta outputs of said code member means and said codegenerator, and a plurality of transition coincidizer circuits forsupplying additional quanta to said adder, to provide an output havingfour more digits than that obtainable directly from said code member.

14. An analog-to-digital encoder comprising a cyclic code disc having aplurality of code circles and a peripheral reference circle having anumber of equal divisions of an order higher than the number of cyclesobtainable from the code circles of said disc, a plurality of live digitcyclic code generators controlled by said reference circle atdiametrically opposite points thereon, means for deriving a cyclicdigital output from said code disc, means for converting to straightdigital codes the cyclic outputs from said code disc and from said codegenerator, an adder for receiving said converted code disc output andthe average of the converted outputs of said code generators, and aplurality of transition coincidizer circuits for supplying additionaloutputs to said adder to produce a straight digital code output of amuch higher order than the digital code output obtained from said codedisc.

15. An analog-todigital encoder comprising a cyclic code disc having aplurality of code circles and a peripheral reference circle having anumber of equal divisions of the next higher order than the number ofcycles obtainable from the code circles of said disc, a plurality oftive digit cyclic code generators controlled by said reference circle atdiametrically opposite points thereon, each of said generators includinga plurality of electrical pickup means confronting said reference circlefor generating electrical waves differing in phase by equal incrementsof 360, means for algebraically combining the generated electrical wavesinto at least as many combinations as generated waves, and means forproducing a digital output from each combination of said generated wavesresponsive to a threshold potential of the combined waves, means forderiving a cyclic digital output from said code disc, means forconverting to straight digital codes the cyclic outputs from said codedisc and from said code generators, an adder for receiving saidconverted code disc output and the average of the converted outputs ofsaid code generators, and a plurality of transition coincidizer circuitsfor supplying additional outputs to said adder to produce a straightdigital code output of an order four digits higher than the digital codeoutput obtained from said code disc.

16. The system according to claim 1S wherein the highest order digitaloutput of the converting means derived from said code disc and thelowest order digital output of the converting means derived from one ofsaid tive digit cyclic code generators control one of the transitioncoincidizer circuits.

17. The system according to claim 15 wherein the highest order digitaloutput derived in accordance with said code disc controls one ot saidtransition coincidizers.

18. In an analog-to-digital encoder system, a digital code disc having acircle provided with a number of equal divisions of an order higher thanthe number of cycles obtainable from the remainder of the code disc,means for projecting light through said circle, a plurality ofphotoelectric devices responsive to said projected light, means forcausing said devices to produce a plurality of sinusoidally varyingsignals displaced from each other by and including means foralgebraically combining the generated electricalwaves into at least asmany combinations as generated waves, and means for producing a digitaloutput from each combination of said generated waves responsive to athreshold potential of the combined waves.

19. The combination of claim 18 with means for ob taining an output fromsaid disc, means associated with the means for obtaining an output fromthe disc for generating a multidigit code, and means for combining themultidigit code generated by said last means with the Code generatedfrom the sinusoidally varying signals.

20. In an analog-to-digital encoder system, a digital code disc having acircle provided with divisions of an order higher than the number ofcycles obtainable from the remainder of the code disc, a plurality ofgroups of photoelectric devices located at diametrically opposite placeson said circle, means for projecting light through said circle to causeeach group of photoelectric devices to produce a plurality ofsinusoidally varying signals displaced in phase by 90, and circuit meansfor comparing the magnitudes of said signals with each other to generatea tive digit code output.

21. A digital code generator comprising a rotatable disc having a trackof alternate transparent and opaque sectors, a plurality ofphotoelectric pickup means confronting said track and spaced from eachother for generating electrical waves differing in phase by equalincrements of 360, means for algebraically combining the generatedelectrical waves into at least as many combinations as generated waves,and means for producing a digital output from each combination of saidgenerated waves responsive to a threshold potential of the combinedwaves.

22. A digital code generator comprising a rotatable disc having a trackof alternate transparent and opaque sectors, means for generating aplurality of electrical waves of different phase including a pluralityof photoelectric pickup means confronting said track, means foralgebraically combining the generated electrical waves into al leas! asmany combined wares as generated waves, and a plurality 0f circuit meansfor making a comparison between the magnitudes of a combined wave and alleast one other combined wave, whereby the output of said plurality ofcircuit means forms a multidigit code.

23. The Combination comprising a code member having an evenly dividedtrack having a plurality of equal length transparent segments separatedby a common distance by opaque segments, means for projecting lightthrough said track, a plurality of photoelectric devices arranged to beenergized by said light, means for integrating the light passing througha number of divisions of said track and for distributing said lightamong said photoelectric devices, means for causing said photoelectricdevices to produce sinusoidally varying signals of different phase inresponse to axial translation of the track, and a multidigit codegenerator electrically connected to the photoelectric devices, thesinusoidally varying signals of the photoelectric devices controllingsaid multidigit code generator.

24. In an analog'todigital encoder system, the elements of claim Z3 incombination with a second multidigit code generator, a second means forprojecting light through the track of the code disc, a second pluralityof photoelectric devices arranged to be energized by said second lightmeans, means for integrating the light of said second light meanspassing through a number of divisions of said track and for distributingsaid light among said second plurality of photoelectric devices, asecond means for causing said second plurality of photoelectric devicesto produce sinusoidally varying signals of dierent phase, and a secondmeans for controlling said second multidigit code generator with saidsinusoidally varying signals from said second means for producing saidsinusoidally varying signals, and means for combining the outputs of thefirst and second multidgit code generators into a single output.

25. A shaft position indicating device having a disc with a circulartrack of a plurality of alternate transparent and opaque sectors, alight source mounted at one side of the disc illuminating a portion ofthe track, a lens disposed on the side of the track opposite the lightsource for projecting an enlarged image of the track, optical meansdisposed on the side of the lens remote from the disc for projecting thesame image of said track to several dierent locations, a gratingdisposed at each location having a plurality of transparent and opaquesectors identical to the image at said location, each grating beingphased in a diferent manner with respect to the image projected by thelens, and a photosensitive device disposed at each location forreceiving light passing through the grating of said location.

References Cited The following references, cited lby the Examiner, areof record in the patented fle of this patent or the original patent.

DARYL W. COOK, Acting Primary Examiner. MAYNARD R. WILBUR, Examiner.

W. I. KOPACZ, Assistant Examiner.

